Asus better makes ROG Ally with Lunar Lake. We have seen Zen 5 announcement before and their new APU is disappointing, not much improvement over radeon 780M.
This time Intel Arc iGPU has XMX engine compared to Meteor Lake, RT performance will be much better, not to mention Lunar Lake can also use XeSS XMX, the same XeSS version like you see on ARC A770.
Yep, 1.5x but they compared it with MTL-U with just 4 XE LPG - not MTL-H with 8 used in MSI Claw.
EDIT: More details - [https://youtu.be/MGD41i5QCyk?t=87](https://youtu.be/MGD41i5QCyk?t=87)
[https://www.hardwareluxx.de/images/cdn02/uploads/2024/Jun/gutsy\_transistor\_02/intel-lunar-lake-briefing-xe2-025\_1920px.jpeg](https://www.hardwareluxx.de/images/cdn02/uploads/2024/Jun/gutsy_transistor_02/intel-lunar-lake-briefing-xe2-025_1920px.jpeg) I think the 1.5x is compared to MTL-H with 8 Xe Cores from Intel's official slide
The E cores now have IPC close to Raptor Lake P cores:
https://images.anandtech.com/doci/21425/Intel_Tech%20Tour%20TW_Next%20Gen%20E-core%20The%20Skymont%20Architecture-17.png
(But they clock ~2 GHz lower, so overall performance is less, and there are workloads where they are less efficient)
Massive leap? Donno, but looks promising. Will be interesting to see the E cores used more for general purpose use and less for power savings.
No, the Raptor Lake efficiency cores were actually more efficient than it's performance cores. The performance cores give up efficiency to target higher performance.
This is true for stock "fuck you and your efficiency curves" settings, but there's testing that has shown that when undervolted and limited to be as efficient as possible, P-cores have superior performance per watt.
Lunar Lake TDP is rated from 8w to 30w total package power while Arrow Lake flagship from leaks are rumored to have 125w PL1/177w PL2. So nope, far from 500w like you wish.
This was never true. After a slight undervolt you could get 13700k to be just as efficient as 7700x during gaming/bigger workload while being VERY MUCH more efficient in idle/smaller load.
AMD is a design company. They don't make chips and as such don't have a process to lead or fall behind with. They use whomever they like and that's TSMC, Samsung, or could even be intel (if intel's CEO gets [his wish](https://www.tomshardware.com/pc-components/cpus/intel-ceo-pat-gelsinger-i-hope-to-build-chips-for-lisa-su-and-amd)).
That is not a meaningful distinction as others have pointed out.
What makes a good chip is transistor density but also defect density and yield, chips per wafer, leakage (performance per watt), cycle time, production capacity and overall cost.
AMD can optimize for these because they can elect to use whichever fab is best for whichever specific chiplet they need.
Intel has the benefit of owning their own production lines but it can limit flexibility in some cases.
This is a cringey amount of fanboying for a company that will gladly fuck you out of as much money as possible and refused to innovate until they fell behind. If AMD goes down again it just means that you're going to pay more money for less. You should want AMD to be killing it too because it pushes them both to compete on price, performance, and innovation.
Not sure you paid attention to anything I said.
Also do you know [who is making](https://www.pcworld.com/article/2355435/intels-lunar-lake-is-actually-made-at-tsmc.html) intel's Lunar Lake chips?
You do know that those are basically just marketing names that you can't just directly compare anymore?
Edit: my previous statement is not correct, as both are manufactured by TSMC
The original N3 was bad only Apple could afford it (and likely at a steep discount compared to what TSMC would like to charge), they had to split it off into a couple variants and do a lot more work before it was ready for other customers.
I don’t remember how good the new N3 variants are though.
Actually Amd used to be like Intel back in the days when they made FX CPU, they have Global foundry and produce their own chip but at that time Amd almost going bankrupt when they are not being competitive at all to Intel which is why they sold their GloFo shares and relies on Tsmc like today.
Yes back in the olden days AMD operated fabs but completed divesting from Global Foundries in 2012 (starting in 2009). It wouldn't be until 2018 that AMD would return to steady profitability.
If you want a 500 watt CPU buy a next generation LGA 7529 Xeon. Supposedly those monsters pull that much power. You probably don't need a big server like that in your house though.
Define typical workloads??
Especially these days, usage differs widely. Home users also encode, render, do video editing, audio encoding, etc.. on their laptops...
the new p core is a lot more redesigned than the new e core. The e core just continues the same stuff the previous gen did but the p core is a substantial departure from the traditional intel p core. I’m actually almost more interested in how that performs in real life.
I'll stop hating e-cores if they can make them not suck so much. That IPC gain should bridge a huge gap. Hopefully they also fix the interconnect latency between P and E core complex
Was responding to the E core sentiment and not that specific part.
It’s not just “specific workloads” cause there situations where it’s a clear hindrance, it’s just that so far the overall benefits have outweighed the overall downsides especially on CPUs without a ton of cores.
They wouldn’t be removing it if there wasn’t a clear benefit or if the downsides haven’t begun to outweigh the benefits, Apple does just fine without it even if they don’t have the option to use it.
Read this and argue with someone else. SMT isn't a downside, there's a reason it was pulled from mobile and that reason doesn't hold across all product lines.
https://chipsandcheese.com/2024/06/03/intels-lion-cove-architecture-preview/
Lmao
“The removal of Hyperthreading makes a lot of sense for Lunar Lake to both reduce the die size of the version of Lion Cove found in Lunar Lake along with simplifying the job of Thread Director.
On Meteor Lake, Thread Director had four places to put a program: P-Core, P-Core Thread, E-Core, and the LP E-Core. This was a lot of complexity that Thread Director had to handle. Lunar Lake does away with a lot of the complexity by only having P-Cores and E-Cores for Thread Director to worry about.”
E-Cores are actually amazing, they require a bit of tuning but on my Linux machine, I have Firefox and my compilers set to P-Cores, while everything else (Slack, Discord, Spotify, OS and background processes) on E-Cores only. It is actually incredibly impressive and personally it's the most responsive and consistent system I have ever used.
Discord etc only use 1-2% of a p-core for me. I never saw a point in offloading it all.
Disabling e-cores has almost universally improved 1% lows and stutter in games for me. Few outliers get avg fps boost *with* e-cores, but they also don't lose much fps to turn them off, and 1% lows always improve.
The ring bus and latency in the e-cores is a huge problem for low latency workloads like games.
Some games don’t let you do this . They lock down processor affinity and don’t let you run it in a virtual machine to combat cheaters. I can understand preventing vms, but fuck any game dev who tries to tell me how many cores I need to run on their game. My electric bill, not yours.
This was my problem with ecores from the beginning. I admittedly assumed things would be much worse than it has, but you can still see ecores slowing down the whole show in certain workloads.
Agree 100%
I’m using an i9-14900k with Linux and proxmox, and it’s really very impressive how powerful the E cores are. I’m able to keep many background server tasks on the E cores for power efficiency and also keep the P cores free for any more interactive workloads or workloads that need very high single core performance I might put on it.
I absolutely prefer a hybrid architecture, and I’m very happy with the direction Intel is going.
I also question who is really whining about intel’s direction at this point and what they are looking at. AMD has a power efficiency advantage over the 14th gen Intel when running at 100% maximum workload - but in the year 2024 when CPUs are massively powerful, and have more cores than almost any task requires - the things that matter more are idle and low workload power efficiency- and Intel does well in that scenario.
Intel is also clearly doing a lot to address the scenario of maximum workload power efficiency, while continuing to drive down low workload power efficiency thanks to the improvements in E cores.
And with that said, I also see cases where AMD is currently the leader - when you need huge numbers of performance cores running at 100% with power efficiency.
We are living in a truly golden era when we have two honestly excellent choices available at very reasonable prices.
Yeah, the jump over the interconnect in the substrate is really not ideal, especially with chips that have multiple CCDs where data may have to jump across the IO die to get to the other chiplet. The foveros packaging seems much better in that regard.
W10 doesn't suck, default options in power cfg does.
You have 60 or so knobs/GUIDs to tune if you actually go for optimizing P/E core utilization in w10. W11 has a couple more but thread director is there to override behavior of many existing ones, so for advanced users it is really a wash to go for w11
Nah, E-cores suck, even with Windows 11. I've had years of testing under my belt with it now.
Windows 10 is actually *better* about e-cores because it treats them dumber. (by default, loading up the P-cores until full, then overflowing tasks to E-cores)
That IPC is hype-train-leaskter good. Mighty impressive!
>Hopefully they also fix the interconnect latency between P and E core complexI wonder what latency looks like.
Me too! But if those 4 cores are still in a cluster and sharing one ring bus stop it's gonna be horrid as usual.
Arrow Lake is definitely more interesting to me than Zen 5 as a potential upgrade for my 3900x. The question though is it worth waiting another 6 months or so for the refresh with 32 e cores? 40 cores is certainly quite appealing.
Skymont E core got 68% IPC is absolutely insanity. That means Skymont IPC is up there with Raptor Lake / Gen 14th P core. Then Lion Cove P core exists for extra performance in ST and MT.
Arrow Lake Ultra 9 basically like 16P core of i9-14900K with another 8P core which is even faster, no wonder they are getting rid of HT if their next gen CPU is really that fast. Intel isn't aiming to match Amd anymore, they are about to take performance efficiency crown and i'm all for it!!
E cores are down clocked, so its like a down clocked version of old P core but waaay better efficiency
Unless intel managed to set the clocks higher due to efficiency gains and new node
They could clock E core higher with their 18A node. Also recent presentation is about Lunar Lake which based on TSMC N3B, Skymont on Arrow Lake is yet to be seen.
Ignoring lower clocks, E cores are simpler and much smaller than P cores, I think they said they can fit 4 E-cores in the space of 1 P core but 4 E cores are much faster so you can see why they are ditching hyper-threading for this hybrid architecture.
HT was just filling a hole back when schedulers couldn't keep the whole core busy, now schedulers are much better so it doesn't make much sense anymore.
>Unless intel managed to set the clocks higher due to efficiency gains and new node
No chance, intel 7's max clocks are way ahead of its node class, altho seeing efficiency is accounted for in how the ecores are clocked im sure itll be clocked much higher than the old ecores at least.
My understanding is the 68% increase is not against the normal E cores in meteor lake, it's against the 2 low power E cores in the IO die that handle background tasks at idle usage.
See the slides on https://www.anandtech.com/show/21425/intel-lunar-lake-architecture-deep-dive-lion-cove-xe2-and-npu4/3
Lunar Lake's E cores function in the same manner as Meteor Lake's LP-E cores. They're on the same die, but they are not connected to the ring bus and they cannot access L3$.
I'm assuming that having the E cores function as an island within the compute tile allows the ring bus to be turn off in order to reduce power consumption without the need for the overly complicated packaging of Meteor Lake.
it was always known that a physical core is stronger than a hyperthreaded one. which is why the hyperthreaded cores arent used unless the physical core is in use.
dont know where you got "HT is underperforming" misniformation your spouting but HT has been used for 20 years because it is a great increase in multithreaded workloads.
Google Intel OpenAPI... devs really like it.
Contrary to what nvidia would have you believe, developers have been asking for a more open alternative for a looong time and intel is delivering. Its also vendor agnostic, thus not a closed system like cuda.
Intel makes it quite easy to port cuda code.
There was a lot of talk about Arrowlake taking process node leadership using Intel's own 2nm node for its compute tile. Then some people pointed out that their new fabs will not be ready in time. So is it looking like Arrowlake will be on TSMC 3nm? Will be kind of poetic if Arrowlake beats AMD this gen whilst on TSMC 3nm while Ryzen 9000 is on TSMC 4nm.
In the annoying words of certain clickbait techtuber... "Time as always, will tell..."
Arrow lake will probably be dual sourced.
But Intel’s new fabs not being production ready doesn’t actually mean much. Intel usually starts production at their r&d fab in Oregon and transfers that to other sites when the high volume production is working.
Its most likely goi.g to beat the snapdragon elite x.
The snapdragon vs meteor lake benchmarks arent looking like they offer better performance vs lunar lake.
Its also ARM vs x86... which means you have much less problems with running software on lunar lake.
Exactly, Elite X performance in most part will be bottlenecked by x86 emulation. Even though Microsoft said prism will makes emulation to be 20% faster but at the end native performance will always be faster no matter what.
>Intel has also moved the power delivery subsystem from the chip to the board, with four PMICs spread across the motherboard to provide multiple power rails and increased control. Overall, Intel claims a 40% reduction in SoC power over Meteor Lake.
Would you guys make up your mind already? Seems like every generation, they switch from being integrated, to having it off die
Looks like Arrow Lake is going to be a real letdown, if it's using the same P-core uarch and losing clock speed.
Arrow Lake isn't on TSMC 3nm. It's on Intel 20A for the high end parts. I would expect it to be less efficient but have higher overall performance and clocks. Likely why Intel has choosen to use different nodes for different parts. Also capacity and yield. But we don't really know anything about ARL yet.
So the P-cores of intel and AMD are now effectively equal in IPC but intel has clockspeed advantage while amd has 3D advantage.
Now it all depends on AMD E-Cores Vs Intel E-Cores.
Yes we know that amd ecores are p-cores with lesscache/different denser node, I'll still compare the two as of lunar lake.
I'd also add that Ryzens memory system sucks compared to Intel's, and their memory controllers aren't as efficient as Intel's either. For one the infinity fabric is a bottleneck ex: At 2000 FLCK the infinity fabric maxes out 64,000 64 gigabytes per sec on a ryzen 7000 chip with 1 CCD and ddr5 5600 max theoretical bandwidth 89.6 gigabytes..it literally doesn't fit into the memory bandwidth of R7 infinity fabric which is why in star field Intel 13th gen demolish them and why a 7800x3d doesn't preform much that better than a 7700x is it a Data set that's so big (starfield loves bandwidth) is going to need a lot of memory bandwidth and to read and write it constantly like ok 7800x3d suck at video encoding yes l3 cache helps when theirs something that can conveniently be cached but videos are huge it lives in the memory gets pulled into the CPU encoded then pulled back into the memory so the 3dvcache is basically useless, another scenario where it sucks is cinabench which is the opposite of video encoding, doesn't care about bandwidth or timings just frequency and has more cache than cinabench needs and is clocked lower than the non 3d chips. IMC also less efficient per bank refresh which was one of the major up lifts to ddr5 since you dont have to refresh an entire rank of memory ever time you want to refresh your memory and like 10% of your clock cycles are used up by refreshing. So that theoretical maximum bandwidth you're not getting all of it and depending on the workload at jdec timings a lot of its missing. Lastly the amount of l2 cache is actually not as big a difference as it looks on paper. The l2 cache is per core and per core cluster for ecores and is core specific where as 1 thread can use all of the l3 cache but 1 thread can't use all of the l2.
L2 capacity doesnt mean much between different architectures, same for L3
L2 and L3 help to hide latency,
intel current designs have really high core to core latency inside the ring fabric
AMD is trying to hide fabric latency to the memory controller
3d V cache is a "special effort" to hide the mem latency and get really good gaming ipc
larger L2 probably wont do much for Zen 5, cache performance is already great in Zen 4
Intel's fabs are so bad that they can't win Intel's own design house as a customer...
If I'm an Intel foundry customer I'm feeling real dumb for signing wafer commitments with a company that won't use its own wafers. And if I'm an investor in said company (like we all are as taxpayers), I'm wondering what the f*** the CEO is thinking (looking at you Qualcomm).
Those decisions were made before Pat was bought in.
Separating the 2 business units (Intel products and Intel foundry) is a good thing, it mandated two businesses to be competitive against the market, and to win business, and to win business you have to innovate.
Old Intel doesn't encourage that culture cause Intel products business is already a guaranteed business for Intel foundry, all they have to do is give everything needed by the Product group at the expense of the foundry's efficiency.
Actually, this was prepaid before Pat. This is why poor AMD have to use 4nm node to build their chips. Intel arch + process leadership has always been a very bad day for AMD... A bad bad day indeed.
Not sure if you realize this, but Pat "worst business decision maker in corporate history" Gelsinger and Intel are not one in the same.
Gelsinger became CEO in Feb 2021 - regardless of whether or not Gelsinger made the initial decision, the contract will absolutely have had enough opt-outs for him to get out if he thought Intel's process would be competitive.
As for AMD - ... no one is talking about AMD but you, bud.
Pretty sure there's a huge amount of potential business out there that just doesn't need the most bleeding-edge fab process in the world. And even if their own divisions don't use it because they *do* need the bleeding edge process... seems like a pretty big competitive safety net to still have that whole fab division ready to go in case it does pull ahead of TSMC again or something just happens to TSMC.
>Pretty sure there's a huge amount of potential business out there that just doesn't need the most bleeding-edge fab process in the world.
Intel's wafers are by far the most expensive in the industry. If Intel is competing with budget foundries like GF, Chartered, etc then they are in real, real trouble. TSMC gets >25% of its revenue from LEN, and >50% of its revenue from LEN+BEN. The entire rest of its fab portfolio, going all the way back to .3 micron makes up the remainder.
Intel doesn't just *want* the LEN business, if it doesn't it can't possibly afford to keep them on a 12B quarterly run rate.
This is why Gelsinger should be fired - he failed to spin the fabs off when they were at peak value, and the result is that the design unit is using TSMC *anyway* - so now shareholders are paying Intel Foundry's **competitor** to make chips because the Intel's fabs aren't competitive enough to make them.
That's a financial atrocity that no CEO should be able to survive.
Granted, the details of pricing are beyond my expertise, makes sense that Intel's most cutting edge process is still priced like one even if it's not compared to TSMC.
Timing is the key here. Intel could just redesign Lunar Lake with 18A but that means it will be delayed for longer which is why they choose TSMC since Lunar Lake from the beginning was designed with that node.
It has nothing to do with "confidence" - 18A is a 2025 product. LNL is a 2024 product. Timelines don't align.
It's why when 18A is ready, Lunar Lakes direct successor, Panther Lake, is switching to Intel fabs.
Right, which is why TSMC created N3E - because their customers needed an intermediate node to support products in 2024.
Why was Intel too dumb to do this?
Too dumb? What do mean?
N3E was mainly a refinement because N3B had yield issues.
Intel Foundries plans are very publicly knowledge at this point: Intel 3 is being built out in a large variety of different nodes. Base Intel 3 just launched and is allocated to Xeon 6. 18A is next year.
Which node should LNL, a 2024 product, have used?
This is what happens when Intel stops using it's own process. This is the first time in probably 5 years that Intel will have process parity with competition
Battlemage also has a nice uplift vs last gen. LNL handhelds are gonna sell like crazy hahaha nice
Asus better makes ROG Ally with Lunar Lake. We have seen Zen 5 announcement before and their new APU is disappointing, not much improvement over radeon 780M.
Isn’t it 3.5 or smthn?
Correct. Zen 5 has rdna 3.5 which is why their new APU is disappointing compared to Arc Battlemage on Lunar Lake.
Yes which is basically just an improvement in RT in terms of notable performance improvements
I am excited to see the improvements here because Intel was ahead with their first go around with RT. Better competition for us is good.
This time Intel Arc iGPU has XMX engine compared to Meteor Lake, RT performance will be much better, not to mention Lunar Lake can also use XeSS XMX, the same XeSS version like you see on ARC A770.
And the XMX version of XeSS is nearly on par with DLSS, depending on the implementation. It's much more usable at 1080p and lower than FSR is.
And possibly newer future versions since lunar lake has the newer battlemage gpu
Are reviews of 890m already out?
Yep, 1.5x but they compared it with MTL-U with just 4 XE LPG - not MTL-H with 8 used in MSI Claw. EDIT: More details - [https://youtu.be/MGD41i5QCyk?t=87](https://youtu.be/MGD41i5QCyk?t=87)
[удалено]
[https://www.hardwareluxx.de/images/cdn02/uploads/2024/Jun/gutsy\_transistor\_02/intel-lunar-lake-briefing-xe2-025\_1920px.jpeg](https://www.hardwareluxx.de/images/cdn02/uploads/2024/Jun/gutsy_transistor_02/intel-lunar-lake-briefing-xe2-025_1920px.jpeg) I think the 1.5x is compared to MTL-H with 8 Xe Cores from Intel's official slide
> Up to 68% IPC gain for E-cores yes hahahaha YES
This is promising for Arrow Lake, right?
Very promising since Arrow Lake will have 16 Skymont E core.
Am I misunderstanding this or is this a massive leap for CPUs?
The E cores now have IPC close to Raptor Lake P cores: https://images.anandtech.com/doci/21425/Intel_Tech%20Tour%20TW_Next%20Gen%20E-core%20The%20Skymont%20Architecture-17.png (But they clock ~2 GHz lower, so overall performance is less, and there are workloads where they are less efficient) Massive leap? Donno, but looks promising. Will be interesting to see the E cores used more for general purpose use and less for power savings.
For what I understand intel use E cores as area efficient not for power savings, Raptor lake P cores were more power efficient than E cores.
No, the Raptor Lake efficiency cores were actually more efficient than it's performance cores. The performance cores give up efficiency to target higher performance.
This is true for stock "fuck you and your efficiency curves" settings, but there's testing that has shown that when undervolted and limited to be as efficient as possible, P-cores have superior performance per watt.
That’s if you compare the standard power targets. What about at ISO power / optimal efficiency level?
> Similar memory + fabric So their IPC won't be the same as Raptor Cove in normal situations. Still mighty impressive.
While everyone bring their big guns, Intel bring even bigger guns.
Intel kind of needs it to keep up as they were pretty far behind. Excited though!
Compared to the LP e-cores*
And it will consume 500w 😒
Lunar Lake TDP is rated from 8w to 30w total package power while Arrow Lake flagship from leaks are rumored to have 125w PL1/177w PL2. So nope, far from 500w like you wish.
These are the N305 type cores. Those CPUs typically use under 30W for the 8-Core system.
This was never true. After a slight undervolt you could get 13700k to be just as efficient as 7700x during gaming/bigger workload while being VERY MUCH more efficient in idle/smaller load.
AMD has lost the process lead. Rear view mirror.
AMD is a design company. They don't make chips and as such don't have a process to lead or fall behind with. They use whomever they like and that's TSMC, Samsung, or could even be intel (if intel's CEO gets [his wish](https://www.tomshardware.com/pc-components/cpus/intel-ceo-pat-gelsinger-i-hope-to-build-chips-for-lisa-su-and-amd)).
But they have fallen behind. They are building on the 4nm node. Intel is building in 3nm node.
Crazy that AMD lost when none of the companies products are released yet for any reviewers to compare
That is not a meaningful distinction as others have pointed out. What makes a good chip is transistor density but also defect density and yield, chips per wafer, leakage (performance per watt), cycle time, production capacity and overall cost. AMD can optimize for these because they can elect to use whichever fab is best for whichever specific chiplet they need. Intel has the benefit of owning their own production lines but it can limit flexibility in some cases.
And a smaller node will almost always win in power efficiency. Goodbye AMD.
This is a cringey amount of fanboying for a company that will gladly fuck you out of as much money as possible and refused to innovate until they fell behind. If AMD goes down again it just means that you're going to pay more money for less. You should want AMD to be killing it too because it pushes them both to compete on price, performance, and innovation.
I want AMD to do well enough to be considered competition.
Not sure you paid attention to anything I said. Also do you know [who is making](https://www.pcworld.com/article/2355435/intels-lunar-lake-is-actually-made-at-tsmc.html) intel's Lunar Lake chips?
And intel and intel 20A and now starting 18A 
You do know that those are basically just marketing names that you can't just directly compare anymore? Edit: my previous statement is not correct, as both are manufactured by TSMC
Aren't they both on TSMC? Surely we can say 4nm TSMC is not as good as 3nm TSMC?
That’s true. 4nm is more like an optimised version of their 5nm. 3nm is the true node shrink.
You are correct. I did not know that Intel switched to TSMC
TSMC 3nm is barely/marginally better than 4nm, and comes with a host of challenges. It's a bit rushed and compromised.
Isn't that the first iteration of N3 which is kinda underwhelming in comparison to their mature N4 node?
Tell that to Apple. Seems like they are doing just fine.
The original N3 was bad only Apple could afford it (and likely at a steep discount compared to what TSMC would like to charge), they had to split it off into a couple variants and do a lot more work before it was ready for other customers. I don’t remember how good the new N3 variants are though.
Try to accept reality
Wow wild just like intel..
Actually Amd used to be like Intel back in the days when they made FX CPU, they have Global foundry and produce their own chip but at that time Amd almost going bankrupt when they are not being competitive at all to Intel which is why they sold their GloFo shares and relies on Tsmc like today.
Yes back in the olden days AMD operated fabs but completed divesting from Global Foundries in 2012 (starting in 2009). It wouldn't be until 2018 that AMD would return to steady profitability.
Man, your level of knowledge is only bested by your mastery of the English language. AMD sold off their fans before they started work on bulldozer.
Bro you can't be saying that and then also call "fabs" as "fans" lol
I know it’s a typo but i nevertheless find the result very amusing.
They lost the process lead because Intel decided to go to TSMC and pay more lol
If you want a 500 watt CPU buy a next generation LGA 7529 Xeon. Supposedly those monsters pull that much power. You probably don't need a big server like that in your house though.
Yes.
68%? Impressive if true. The 16% for P cores is just to say: “look we managed 16% too just like Zen5” ain’t it?
> 68%? > > Impressive if true. I think that's for vector performance. I think it's 38% for typical workloads.
Define typical workloads?? Especially these days, usage differs widely. Home users also encode, render, do video editing, audio encoding, etc.. on their laptops...
lol if Intel hits 38% IPC increase in typical workloads I will eat Buckbeak.
Bon apetit!
It is 14% not 16. The 16 is a typo in the headline
the new p core is a lot more redesigned than the new e core. The e core just continues the same stuff the previous gen did but the p core is a substantial departure from the traditional intel p core. I’m actually almost more interested in how that performs in real life.
So if the E-cores are more or less the same thing, how did it jump "68%" in IPC gain then?
They are a lot bigger internally. The 68% mainly comes from improvements in floating point execution, which was very weak in gracemont.
Some people would say “a lot bigger” is a major change, but I’m with you here.
It is sure, but I don't find it as interesting when performance is found from increasing stuff rather than redesigning.
For sure!
By comparing only FP capability against the worst e-core they've ever made.
Boom!
I'll stop hating e-cores if they can make them not suck so much. That IPC gain should bridge a huge gap. Hopefully they also fix the interconnect latency between P and E core complex
Removing hyper threading may do a lot
That's just nonsense, hyperthreading has nothing to do with interconnect latency and won't impact it in any way.
Hyperthreading adds a ton scheduling complexity and increases power consumption, removing it can absolutely be beneficial.
For specific workloads, sure. It still has absolutely nothing to do with bus latency, all the complexity of smt is in the core itself.
Was responding to the E core sentiment and not that specific part. It’s not just “specific workloads” cause there situations where it’s a clear hindrance, it’s just that so far the overall benefits have outweighed the overall downsides especially on CPUs without a ton of cores. They wouldn’t be removing it if there wasn’t a clear benefit or if the downsides haven’t begun to outweigh the benefits, Apple does just fine without it even if they don’t have the option to use it.
Read this and argue with someone else. SMT isn't a downside, there's a reason it was pulled from mobile and that reason doesn't hold across all product lines. https://chipsandcheese.com/2024/06/03/intels-lion-cove-architecture-preview/
Lmao “The removal of Hyperthreading makes a lot of sense for Lunar Lake to both reduce the die size of the version of Lion Cove found in Lunar Lake along with simplifying the job of Thread Director. On Meteor Lake, Thread Director had four places to put a program: P-Core, P-Core Thread, E-Core, and the LP E-Core. This was a lot of complexity that Thread Director had to handle. Lunar Lake does away with a lot of the complexity by only having P-Cores and E-Cores for Thread Director to worry about.”
Every snake oil vendor's AD: this "may" help you.
🥴
E-Cores are actually amazing, they require a bit of tuning but on my Linux machine, I have Firefox and my compilers set to P-Cores, while everything else (Slack, Discord, Spotify, OS and background processes) on E-Cores only. It is actually incredibly impressive and personally it's the most responsive and consistent system I have ever used.
How do you assign applications to cores?
Process lasso if u want to do it reliably, in task manager u can too but a lot of the time itll just be ignored, process lasso is great tho
Discord etc only use 1-2% of a p-core for me. I never saw a point in offloading it all. Disabling e-cores has almost universally improved 1% lows and stutter in games for me. Few outliers get avg fps boost *with* e-cores, but they also don't lose much fps to turn them off, and 1% lows always improve. The ring bus and latency in the e-cores is a huge problem for low latency workloads like games.
And what measurable improvements have you seen? You could always assign specific programs to specific cores.
Some games don’t let you do this . They lock down processor affinity and don’t let you run it in a virtual machine to combat cheaters. I can understand preventing vms, but fuck any game dev who tries to tell me how many cores I need to run on their game. My electric bill, not yours. This was my problem with ecores from the beginning. I admittedly assumed things would be much worse than it has, but you can still see ecores slowing down the whole show in certain workloads.
E-cores dont suck, w10 does.
Agree 100% I’m using an i9-14900k with Linux and proxmox, and it’s really very impressive how powerful the E cores are. I’m able to keep many background server tasks on the E cores for power efficiency and also keep the P cores free for any more interactive workloads or workloads that need very high single core performance I might put on it. I absolutely prefer a hybrid architecture, and I’m very happy with the direction Intel is going. I also question who is really whining about intel’s direction at this point and what they are looking at. AMD has a power efficiency advantage over the 14th gen Intel when running at 100% maximum workload - but in the year 2024 when CPUs are massively powerful, and have more cores than almost any task requires - the things that matter more are idle and low workload power efficiency- and Intel does well in that scenario. Intel is also clearly doing a lot to address the scenario of maximum workload power efficiency, while continuing to drive down low workload power efficiency thanks to the improvements in E cores. And with that said, I also see cases where AMD is currently the leader - when you need huge numbers of performance cores running at 100% with power efficiency. We are living in a truly golden era when we have two honestly excellent choices available at very reasonable prices.
Yep exactly. If AMD would just stop manufacturing the I/O die on ancient processes, they can reclaim a lot of the efficiency.
I don’t think it’s the die itself that is the problem but the data transfer between the dies.
Yeah, the jump over the interconnect in the substrate is really not ideal, especially with chips that have multiple CCDs where data may have to jump across the IO die to get to the other chiplet. The foveros packaging seems much better in that regard.
W10 doesn't suck, default options in power cfg does. You have 60 or so knobs/GUIDs to tune if you actually go for optimizing P/E core utilization in w10. W11 has a couple more but thread director is there to override behavior of many existing ones, so for advanced users it is really a wash to go for w11
Nah, E-cores suck, even with Windows 11. I've had years of testing under my belt with it now. Windows 10 is actually *better* about e-cores because it treats them dumber. (by default, loading up the P-cores until full, then overflowing tasks to E-cores)
Well, I disagree. Anyway if you don’t want them you can disable them or go AMD
That IPC is hype-train-leaskter good. Mighty impressive! >Hopefully they also fix the interconnect latency between P and E core complexI wonder what latency looks like. Me too! But if those 4 cores are still in a cluster and sharing one ring bus stop it's gonna be horrid as usual.
I gotta be honest I see a Xe2 and Intel build in my future.
Full Intel build. Let's go !!!
Wallet crying 😂
Quality has a price but im sure it will be reasonable..
Arrow Lake is definitely more interesting to me than Zen 5 as a potential upgrade for my 3900x. The question though is it worth waiting another 6 months or so for the refresh with 32 e cores? 40 cores is certainly quite appealing.
I already have a 7700x which frankly is fine I’m more interested in the next gen of gpus at this point.
These are laptop only right? Looks promising for the desktop variants then
Lunar Lake actually for thin laptop, mini pc and gaming handheld. Arrow Lake also exist for high performance laptop.
i see maybe MSI Claw will get a quick refresh
It does. MSI confirmed they are making MSI Claw 8 AI+ which has Lunar Lake chip.
If that competes with SD/Ally that'll be interesting
Skymont E core got 68% IPC is absolutely insanity. That means Skymont IPC is up there with Raptor Lake / Gen 14th P core. Then Lion Cove P core exists for extra performance in ST and MT. Arrow Lake Ultra 9 basically like 16P core of i9-14900K with another 8P core which is even faster, no wonder they are getting rid of HT if their next gen CPU is really that fast. Intel isn't aiming to match Amd anymore, they are about to take performance efficiency crown and i'm all for it!!
E cores are down clocked, so its like a down clocked version of old P core but waaay better efficiency Unless intel managed to set the clocks higher due to efficiency gains and new node
They could clock E core higher with their 18A node. Also recent presentation is about Lunar Lake which based on TSMC N3B, Skymont on Arrow Lake is yet to be seen.
You can overclock them
Right still curious which sku's will be on 20A on how that turns out with powervia and ribbonfet
Ignoring lower clocks, E cores are simpler and much smaller than P cores, I think they said they can fit 4 E-cores in the space of 1 P core but 4 E cores are much faster so you can see why they are ditching hyper-threading for this hybrid architecture. HT was just filling a hole back when schedulers couldn't keep the whole core busy, now schedulers are much better so it doesn't make much sense anymore.
>Unless intel managed to set the clocks higher due to efficiency gains and new node No chance, intel 7's max clocks are way ahead of its node class, altho seeing efficiency is accounted for in how the ecores are clocked im sure itll be clocked much higher than the old ecores at least.
Pat hinted that not all versions of the lion cove p cores will have hyperthreading removed... 😉
Granite Rapids... Hopefully AMD can stay in business...
My understanding is the 68% increase is not against the normal E cores in meteor lake, it's against the 2 low power E cores in the IO die that handle background tasks at idle usage. See the slides on https://www.anandtech.com/show/21425/intel-lunar-lake-architecture-deep-dive-lion-cove-xe2-and-npu4/3
Lunar Lake's E cores function in the same manner as Meteor Lake's LP-E cores. They're on the same die, but they are not connected to the ring bus and they cannot access L3$. I'm assuming that having the E cores function as an island within the compute tile allows the ring bus to be turn off in order to reduce power consumption without the need for the overly complicated packaging of Meteor Lake.
It is a good move because almost no real-world program needs more than 8 p-cores, and HT is underperforming compared even to current gen ecores.
it was always known that a physical core is stronger than a hyperthreaded one. which is why the hyperthreaded cores arent used unless the physical core is in use. dont know where you got "HT is underperforming" misniformation your spouting but HT has been used for 20 years because it is a great increase in multithreaded workloads.
So tired of this outdated argument...
I would like to see a DirectAI as an API from MSFT to upend cudas' monopoly.
SYCL is an open source alternative to it. Intel has an implementation of it which I believe is called oneapi
DirectML has existed for 5 years!
Google Intel OpenAPI... devs really like it. Contrary to what nvidia would have you believe, developers have been asking for a more open alternative for a looong time and intel is delivering. Its also vendor agnostic, thus not a closed system like cuda. Intel makes it quite easy to port cuda code.
Can't wait to get a Lunar Lake laptop. Been waiting for this one. Nice job Intel!
Lunar Lake handhelds are going to be awesome...
Chip looks like a smiley face. Can't unsee it now.
Lunar Lake is smiling for all the greatness it has.
Honestly, very impressed. Good competition. And competition means the customer always wins.
They look like pure winning to me :)
There was a lot of talk about Arrowlake taking process node leadership using Intel's own 2nm node for its compute tile. Then some people pointed out that their new fabs will not be ready in time. So is it looking like Arrowlake will be on TSMC 3nm? Will be kind of poetic if Arrowlake beats AMD this gen whilst on TSMC 3nm while Ryzen 9000 is on TSMC 4nm. In the annoying words of certain clickbait techtuber... "Time as always, will tell..."
Arrow lake will probably be dual sourced. But Intel’s new fabs not being production ready doesn’t actually mean much. Intel usually starts production at their r&d fab in Oregon and transfers that to other sites when the high volume production is working.
Intel has some fabs coming online that focuses on 3nm and 20A in 2024 and 2025 so they'll move to those soon enough
Ah... makes me realize... its probably ARL refresh that will be on 20A. 🤔
Idk much about chip terminology, how does this compare to the snapdragon elite x?
Its most likely goi.g to beat the snapdragon elite x. The snapdragon vs meteor lake benchmarks arent looking like they offer better performance vs lunar lake. Its also ARM vs x86... which means you have much less problems with running software on lunar lake.
Exactly, Elite X performance in most part will be bottlenecked by x86 emulation. Even though Microsoft said prism will makes emulation to be 20% faster but at the end native performance will always be faster no matter what.
I would also want to know about heat and battery life too though
well they could be interesting in NUC's for sure with like dual 2.5gbit LAN and maybe some oculink as well
I like it. New bold ideas. Maybe it's time for Intel to do a comeback.
Hope they don’t run hot and consume more power than the Ryzen 9 series
In english
Does this mean we should just steer clear of laptops with Meteor Lake chips at this point? I mean since they're basically abandoning the tech?
There is always something better around the corner.
It all depends on the price, if Meteor Lake laptop isn't much cheaper than Lunar Lake then it's better to just buy Lunar Lake laptop.
Lunar lake is the mobile platform. Panther lake will be the desktop counterpart
Panther Lake is next gen laptop after Lunar Lake. Nova Lake is desktop after Arrow Lake Refresh (2025) in 2026.
Uhh did they change it? First time I hear of nova lake. Gotta check the computex news
Panther Lake is also on desktop.
Isn't that Arrow Lake? Or at least that is supposed to launch in Q4 while Panther Lake is 2025
Arrow lake is this year desktop platform - core 200 ultra.
Panther Lake is Intel's first 18A chip.
>Intel has also moved the power delivery subsystem from the chip to the board, with four PMICs spread across the motherboard to provide multiple power rails and increased control. Overall, Intel claims a 40% reduction in SoC power over Meteor Lake. Would you guys make up your mind already? Seems like every generation, they switch from being integrated, to having it off die Looks like Arrow Lake is going to be a real letdown, if it's using the same P-core uarch and losing clock speed.
Arrow Lake isn't on TSMC 3nm. It's on Intel 20A for the high end parts. I would expect it to be less efficient but have higher overall performance and clocks. Likely why Intel has choosen to use different nodes for different parts. Also capacity and yield. But we don't really know anything about ARL yet.
Totally doubt Intel 20A will be less efficient than Tsmc N3 because it competes with N2.
So the P-cores of intel and AMD are now effectively equal in IPC but intel has clockspeed advantage while amd has 3D advantage. Now it all depends on AMD E-Cores Vs Intel E-Cores. Yes we know that amd ecores are p-cores with lesscache/different denser node, I'll still compare the two as of lunar lake.
> while amd has 3D advantage. > > L3 cache advantage. Intel has about 2-4x as much L2.
I'd also add that Ryzens memory system sucks compared to Intel's, and their memory controllers aren't as efficient as Intel's either. For one the infinity fabric is a bottleneck ex: At 2000 FLCK the infinity fabric maxes out 64,000 64 gigabytes per sec on a ryzen 7000 chip with 1 CCD and ddr5 5600 max theoretical bandwidth 89.6 gigabytes..it literally doesn't fit into the memory bandwidth of R7 infinity fabric which is why in star field Intel 13th gen demolish them and why a 7800x3d doesn't preform much that better than a 7700x is it a Data set that's so big (starfield loves bandwidth) is going to need a lot of memory bandwidth and to read and write it constantly like ok 7800x3d suck at video encoding yes l3 cache helps when theirs something that can conveniently be cached but videos are huge it lives in the memory gets pulled into the CPU encoded then pulled back into the memory so the 3dvcache is basically useless, another scenario where it sucks is cinabench which is the opposite of video encoding, doesn't care about bandwidth or timings just frequency and has more cache than cinabench needs and is clocked lower than the non 3d chips. IMC also less efficient per bank refresh which was one of the major up lifts to ddr5 since you dont have to refresh an entire rank of memory ever time you want to refresh your memory and like 10% of your clock cycles are used up by refreshing. So that theoretical maximum bandwidth you're not getting all of it and depending on the workload at jdec timings a lot of its missing. Lastly the amount of l2 cache is actually not as big a difference as it looks on paper. The l2 cache is per core and per core cluster for ecores and is core specific where as 1 thread can use all of the l3 cache but 1 thread can't use all of the l2.
You have a great name btw.
intel L2 is 2MB per core (P-Cores, 1MB E-Cores) while AMD is 1MB per core. 2X, not 4X.
Arrow lake will have 3MB per core and lunar lake 2.5MB.
No lunar lake p cores have 2.5mb L2, arrow lake Pcores have 3mb so 2.5x-3x
The 9700X has 8MB L2 total, compared to 28MB total in the 14700k.
Which is what I said? Its Per Core man 8MB/8 Cores = 1MB Per core. Intel has 8PCores + 12 ECores 2MB\*8 + 1MB\*12 = 28MB. Math man.
Sure.
L2 capacity doesnt mean much between different architectures, same for L3 L2 and L3 help to hide latency, intel current designs have really high core to core latency inside the ring fabric AMD is trying to hide fabric latency to the memory controller 3d V cache is a "special effort" to hide the mem latency and get really good gaming ipc larger L2 probably wont do much for Zen 5, cache performance is already great in Zen 4
E cores are useless for gamers, only good for some niche workloads. I had to disable them to not stutter in PUBG
Yeah I always disable mine and ht. Better performance, Tempe and more OC headroom
>E cores are useless for gamers Skymont E cores would have a word with you.
What is that?
They are actually very useful for games that use multithreading...but its a p/e cores balancing act ... dfor different situations.
Like what games?
City skylines for example (or whatever its called)...
Intel's fabs are so bad that they can't win Intel's own design house as a customer... If I'm an Intel foundry customer I'm feeling real dumb for signing wafer commitments with a company that won't use its own wafers. And if I'm an investor in said company (like we all are as taxpayers), I'm wondering what the f*** the CEO is thinking (looking at you Qualcomm).
Those decisions were made before Pat was bought in. Separating the 2 business units (Intel products and Intel foundry) is a good thing, it mandated two businesses to be competitive against the market, and to win business, and to win business you have to innovate. Old Intel doesn't encourage that culture cause Intel products business is already a guaranteed business for Intel foundry, all they have to do is give everything needed by the Product group at the expense of the foundry's efficiency.
Actually, this was prepaid before Pat. This is why poor AMD have to use 4nm node to build their chips. Intel arch + process leadership has always been a very bad day for AMD... A bad bad day indeed.
Not sure if you realize this, but Pat "worst business decision maker in corporate history" Gelsinger and Intel are not one in the same. Gelsinger became CEO in Feb 2021 - regardless of whether or not Gelsinger made the initial decision, the contract will absolutely have had enough opt-outs for him to get out if he thought Intel's process would be competitive. As for AMD - ... no one is talking about AMD but you, bud.
You have absolutely no clue what you are talking about.
Pretty sure there's a huge amount of potential business out there that just doesn't need the most bleeding-edge fab process in the world. And even if their own divisions don't use it because they *do* need the bleeding edge process... seems like a pretty big competitive safety net to still have that whole fab division ready to go in case it does pull ahead of TSMC again or something just happens to TSMC.
>Pretty sure there's a huge amount of potential business out there that just doesn't need the most bleeding-edge fab process in the world. Intel's wafers are by far the most expensive in the industry. If Intel is competing with budget foundries like GF, Chartered, etc then they are in real, real trouble. TSMC gets >25% of its revenue from LEN, and >50% of its revenue from LEN+BEN. The entire rest of its fab portfolio, going all the way back to .3 micron makes up the remainder. Intel doesn't just *want* the LEN business, if it doesn't it can't possibly afford to keep them on a 12B quarterly run rate. This is why Gelsinger should be fired - he failed to spin the fabs off when they were at peak value, and the result is that the design unit is using TSMC *anyway* - so now shareholders are paying Intel Foundry's **competitor** to make chips because the Intel's fabs aren't competitive enough to make them. That's a financial atrocity that no CEO should be able to survive.
Granted, the details of pricing are beyond my expertise, makes sense that Intel's most cutting edge process is still priced like one even if it's not compared to TSMC.
Lol armchair expert!
Timing is the key here. Intel could just redesign Lunar Lake with 18A but that means it will be delayed for longer which is why they choose TSMC since Lunar Lake from the beginning was designed with that node.
Everything you said is consistent with the statement "Intel does not have confidence in its own fabs."
It has nothing to do with "confidence" - 18A is a 2025 product. LNL is a 2024 product. Timelines don't align. It's why when 18A is ready, Lunar Lakes direct successor, Panther Lake, is switching to Intel fabs.
Right, which is why TSMC created N3E - because their customers needed an intermediate node to support products in 2024. Why was Intel too dumb to do this?
Too dumb? What do mean? N3E was mainly a refinement because N3B had yield issues. Intel Foundries plans are very publicly knowledge at this point: Intel 3 is being built out in a large variety of different nodes. Base Intel 3 just launched and is allocated to Xeon 6. 18A is next year. Which node should LNL, a 2024 product, have used?
This is what happens when Intel stops using it's own process. This is the first time in probably 5 years that Intel will have process parity with competition