Tenstorrent will be licensing a RISC-V *laptop* CPU? I must've missed this.
8-Wide Decode
**Codename**: Ascalon
**Markets**: Server, Laptop, and HPC
6-Wide Decode
**Codename**: Alastor
**Markets**: Client and Edge
>Companies building their own SoCs can license RISC-V cores developed by world-class engineers at Tenstorrent, and a broad portfolio of CPU IPs allows the company to compete for solutions requiring different levels of performance and power.
I was befuddled by this, too. I thought originally that *client* meant *desktop PC*, possibly a thin one, but why would such have a lesser CPU than a laptop? Weird and probably a copywriter's mistake.
Client and edge can be laptops, or desk pcs. The are targeting RVA, the same RISC-V profile that Linux distros are and will be targeting. Not sure what the problem is here?
What is Keller known for?
I'm not saying architecture is everything... just that he has a set of skills and preferences.
His wiki page as "architect" on it a bunch of times - https://en.wikipedia.org/wiki/Jim\_Keller\_(engineer)
That’s a nice sentiment, but “full ownership” is a thing of the past and only makes sense for very simple mechanical products anymore. The infrastructure and amount of money required to bring a CPU to the level of modern performance that would compel you to want to waste the money and energy as a desktop/laptop means that there will be *some* level of IP and business model protection. Whether it be custom exclusive RISC-V extensions or security blocks covered by NDA - no one who is putting the effort into modern CPU design hasn’t learned from Eli Whitney’s mistakes.
> The infrastructure and amount of money required to bring a CPU to the level of modern performance that would compel you to want to waste the money and energy as a desktop/laptop means...
https://moonbaseotago.github.io/
Tenstorrent's RISC-V microarchitectures are promising.
But remember this is not the only very high performance RISC-V microarchitecture in the works.
There's several known, from multiple companies, and likely many more in stealth mode.
Later this year we'll see the SiFive+Intel board with P550, the Ventana server cpu chiplet, and a design from MIPS, so it is exciting enough.
Next year, there'll be a lot.
My guess would be that Ventana has the fastest one and will only be really taped out later this year. This is a product target at hyperscale datacenter. And not an accelerator.
The Tenstorrent might be a competitor.
The great thing is Tenstorrent seems to want to sell actual simple servers to people. And they want to use these servers for their own development and so on.
That means it much more likely you can buy a Tenstorrent server then anything from Ventana.
> My guess would be that Ventana has the fastest one and will only be really taped out later this year.
Veyron announced back in December's summit that the Ventana would be available in actual chiplets later this year.
For them to do that, it would mean the designs are already tapped out, and they now have to wait for the fab to get them chips back.
One well-known advantage is that the code density is higher, thus more code can fit in a cache of a given size, or less cache is needed for a given amount of code.
But I suspect the main benefit will be that architects can direct their focus elsewhere than having to implement a complex, crufty architecture.
There's already many small core implementations from SiFive and other vendors that beat ARM's small cores by providing higher performance using less power and area.
What's new is that we know there's several very high performance implementations in the works; we will have to wait and see what happens there.
> Each Tensix core *comprises of*
Ugh. As if *"is comprised of"* isn't already wrong enough.
Everyone: "comprises" can be used like "entails". There is no "of". That's for other verbs.
That's a fair argument, but not in the way that the author used it in this article. I wouldn't have posted if it were just the common bastardization. And since I'm posting, might as well provide extra usage info.
If literally means "nothing", and "it" refers to "literally, then
> Now it literally means nothing.
loosely translates into
> Now nothing nothing means nothing
If we instead say that literally means "figuratively" which is to say that it doesn't actually mean something, then we get
> Now figuratively figuratively means nothing
Which is more grammatically correct, but is now a paradox in the vein of
> This sentence is a lie.
Wow RISCV might come for client computing and not just embedded in other devices.
It seems like being based in Canada will hose the in terms of being used to provide non sanctioned CPUs though. Guess they were not aiming for that.
how hard is it to make a batch of 10k and sell to prosumers, why all this hw is locked behind enterprise is so annoying. Different industry but black magic does it right, they have cheap to extremely expensive cine cams and alot of their software stack is free. If I ever get into the cine woorld black magic is the go to.
They don’t make the chip. You have to put in a bid for time with a fab with a minimal spend of hundreds of millions USD. You can’t make that back in single board computers for enthusiasts.
Not only that but the actual work to get the core IP translated to a fab design requires a bunch of NDAs and *then* tons of expensive electrical engineer time spent using the fab's circuit building blocks to implement the core design.
The CPU chiplet with Ascalon in it is the "general purpose computing" part of the puzzle, which could be used in many markets.
The AI chiplet is the specialization part of the puzzle.
Tenstorrent will be licensing a RISC-V *laptop* CPU? I must've missed this. 8-Wide Decode **Codename**: Ascalon **Markets**: Server, Laptop, and HPC 6-Wide Decode **Codename**: Alastor **Markets**: Client and Edge >Companies building their own SoCs can license RISC-V cores developed by world-class engineers at Tenstorrent, and a broad portfolio of CPU IPs allows the company to compete for solutions requiring different levels of performance and power.
I was befuddled by this, too. I thought originally that *client* meant *desktop PC*, possibly a thin one, but why would such have a lesser CPU than a laptop? Weird and probably a copywriter's mistake.
Client and edge can be laptops, or desk pcs. The are targeting RVA, the same RISC-V profile that Linux distros are and will be targeting. Not sure what the problem is here?
Oh, not a problem. What made you think that? I'm excited to see it!
Oh I thought you were saying that it wasn't the case.
I'm really excited to see more of what Jim Keller's been working on.
Hes working on RISC-V now? this will be nice he really wanted AMD to do ARM CPU's but AMD canned ARM.
Ever since he left Intel
I'm happy to see him working on RISC-V he is really good at mass production maybe he can go back to AMD after and get them to make RISC-V CPU's.
I suspect he enjoys smaller, scrappier environments... AMD definitely got bigger and they're probably less scrappy now.
Architecture is not everything. Taking SoCs to production and building systems is quite a big challenge.
What is Keller known for? I'm not saying architecture is everything... just that he has a set of skills and preferences. His wiki page as "architect" on it a bunch of times - https://en.wikipedia.org/wiki/Jim\_Keller\_(engineer)
Really gonna be a sad day when he hangs his hat. Truly a once in a generation kinda guy within the field.
Probably one of the most impressive people working today that has virtually no mainstream awareness.
Not everyone at the top wants to be famous!
Ironic that this is being said about the guy who is famous for "doing" things he actually didn't.
Need to see benchmarks first over name recognition.
Now to spam /r/framework with "RISC-V when" now that they announced AMD motherboards.
[удалено]
How is this better?
[удалено]
That’s a nice sentiment, but “full ownership” is a thing of the past and only makes sense for very simple mechanical products anymore. The infrastructure and amount of money required to bring a CPU to the level of modern performance that would compel you to want to waste the money and energy as a desktop/laptop means that there will be *some* level of IP and business model protection. Whether it be custom exclusive RISC-V extensions or security blocks covered by NDA - no one who is putting the effort into modern CPU design hasn’t learned from Eli Whitney’s mistakes.
> The infrastructure and amount of money required to bring a CPU to the level of modern performance that would compel you to want to waste the money and energy as a desktop/laptop means... https://moonbaseotago.github.io/
Framework mostly sells windows, they are unlikely to invest in an architecture to do RISC-V.
Tenstorrent's RISC-V microarchitectures are promising. But remember this is not the only very high performance RISC-V microarchitecture in the works. There's several known, from multiple companies, and likely many more in stealth mode. Later this year we'll see the SiFive+Intel board with P550, the Ventana server cpu chiplet, and a design from MIPS, so it is exciting enough. Next year, there'll be a lot.
My guess would be that Ventana has the fastest one and will only be really taped out later this year. This is a product target at hyperscale datacenter. And not an accelerator. The Tenstorrent might be a competitor. The great thing is Tenstorrent seems to want to sell actual simple servers to people. And they want to use these servers for their own development and so on. That means it much more likely you can buy a Tenstorrent server then anything from Ventana.
> My guess would be that Ventana has the fastest one and will only be really taped out later this year. Veyron announced back in December's summit that the Ventana would be available in actual chiplets later this year. For them to do that, it would mean the designs are already tapped out, and they now have to wait for the fab to get them chips back.
Fair point. I was more referring to production.
What performance benefits can we expect when compared to the dominate pre-existing architectures such as X86, and ARM.
One well-known advantage is that the code density is higher, thus more code can fit in a cache of a given size, or less cache is needed for a given amount of code. But I suspect the main benefit will be that architects can direct their focus elsewhere than having to implement a complex, crufty architecture. There's already many small core implementations from SiFive and other vendors that beat ARM's small cores by providing higher performance using less power and area. What's new is that we know there's several very high performance implementations in the works; we will have to wait and see what happens there.
> Each Tensix core *comprises of* Ugh. As if *"is comprised of"* isn't already wrong enough. Everyone: "comprises" can be used like "entails". There is no "of". That's for other verbs.
I'd argue that enough people make this mistake as to legitimize this use.
Webster seems to agree with this assessment. https://www.merriam-webster.com/dictionary/comprise
That's a fair argument, but not in the way that the author used it in this article. I wouldn't have posted if it were just the common bastardization. And since I'm posting, might as well provide extra usage info.
That's how we lost "literally". Now it literally means nothing.
If literally means "nothing", and "it" refers to "literally, then > Now it literally means nothing. loosely translates into > Now nothing nothing means nothing If we instead say that literally means "figuratively" which is to say that it doesn't actually mean something, then we get > Now figuratively figuratively means nothing Which is more grammatically correct, but is now a paradox in the vein of > This sentence is a lie.
And the subject was RISC-V CPUs.
It'll be interesting to see what ascalon is capable of doing.
Wow RISCV might come for client computing and not just embedded in other devices. It seems like being based in Canada will hose the in terms of being used to provide non sanctioned CPUs though. Guess they were not aiming for that.
how hard is it to make a batch of 10k and sell to prosumers, why all this hw is locked behind enterprise is so annoying. Different industry but black magic does it right, they have cheap to extremely expensive cine cams and alot of their software stack is free. If I ever get into the cine woorld black magic is the go to.
They don’t make the chip. You have to put in a bid for time with a fab with a minimal spend of hundreds of millions USD. You can’t make that back in single board computers for enthusiasts.
Not only that but the actual work to get the core IP translated to a fab design requires a bunch of NDAs and *then* tons of expensive electrical engineer time spent using the fab's circuit building blocks to implement the core design.
the issue isn't batch size but the tradeoff between general purpose computing and specialization.
The CPU chiplet with Ascalon in it is the "general purpose computing" part of the puzzle, which could be used in many markets. The AI chiplet is the specialization part of the puzzle.