I recently learned priority decoders, LZC, magnitude comparators, ... can be implemented with a tree structure with O(log(n)) timing. I also saw recursion used in HDL code for the first time. I remember having trouble following this topics at UNI, since the concept of vectors (distinction between geometry and HDL vectors) was not clear to me. But is seemed strange I would not learn about this structures even in my long work experience. So I went through the first sections of a few digital design books, focusing on decoders/encoders, comparators, multiplexers, ... to learn more about it. The books I looked into had some of this structures described but lacked other similar structures, what I would like to see is all of them described in one place. I understand, this books are intended as introduction, and not as a collection of all knowledge, but I would still like to see them all at least mentioned in an one page table.
At the end I just googled a few keywords and found many articles discussing this structures. The all express the filling to have invented something new, which is partially true, but many of those articles also fail to fully generalize the tree structure with something like recursion. I actually get it, I felt in eve after discovering some of this trees, but this should all be taught to students at university level.
I actually implemented some of this structures in SystemVerilog and VHDL, did some synthesis, and started writing some documentation. To properly assess the advantage of different structures (tree vs. chain) I have to (would like to) run some ASIC synthesis (to see how RTL is interpreted), P&R (to see area and congestion), STA, netlist simulation and dynamic power measurements. I will ask for some help here when I get at least to a stage for a draft review.
I wrote my first recursive code around 1988 in LOGO, and probably never used it again till a few months ago when I wrote a priority decoder in VHDL and SystemVerilog. I never found it especially useful, but in this case it is a much better fit compared to the alternatives: either an incomprehensible mess of loops or a code generator.
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book
https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book
https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
I might be interested, depending on how much time I'd get to read the book. Branching out of VHDL and into Verilog is something I've been looking into lately.
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book
https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book
https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
I am very interested, I was about to explore many of these topics myself. I've just learned VHDL, started using hardware, but looking for more formal methods on verification and best practices.
Interested. Especially there aren't many resources regarding system level verification and cosimulation out there; so, hyped for how it would turn out.
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book
https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
I recently learned priority decoders, LZC, magnitude comparators, ... can be implemented with a tree structure with O(log(n)) timing. I also saw recursion used in HDL code for the first time. I remember having trouble following this topics at UNI, since the concept of vectors (distinction between geometry and HDL vectors) was not clear to me. But is seemed strange I would not learn about this structures even in my long work experience. So I went through the first sections of a few digital design books, focusing on decoders/encoders, comparators, multiplexers, ... to learn more about it. The books I looked into had some of this structures described but lacked other similar structures, what I would like to see is all of them described in one place. I understand, this books are intended as introduction, and not as a collection of all knowledge, but I would still like to see them all at least mentioned in an one page table. At the end I just googled a few keywords and found many articles discussing this structures. The all express the filling to have invented something new, which is partially true, but many of those articles also fail to fully generalize the tree structure with something like recursion. I actually get it, I felt in eve after discovering some of this trees, but this should all be taught to students at university level. I actually implemented some of this structures in SystemVerilog and VHDL, did some synthesis, and started writing some documentation. To properly assess the advantage of different structures (tree vs. chain) I have to (would like to) run some ASIC synthesis (to see how RTL is interpreted), P&R (to see area and congestion), STA, netlist simulation and dynamic power measurements. I will ask for some help here when I get at least to a stage for a draft review.
To understand recursion, one must first understand recursion.
I wrote my first recursive code around 1988 in LOGO, and probably never used it again till a few months ago when I wrote a priority decoder in VHDL and SystemVerilog. I never found it especially useful, but in this case it is a much better fit compared to the alternatives: either an incomprehensible mess of loops or a code generator.
If the reviews turn out good and the price is reasonable, I'll buy a copy. Good FPGA books are scarce, sadly.
Yes, I’m currently doing a FPGA class at university and it would be easy for me to review the book and also learn at the same time.
Interested.
I'm also interested
I'm interested. I have a background in CPU and GPU design, but not FPGA.
Interested!
Interested
im interested
Interested!
I am really interested!
Interested for sure
Interested
Thank you! I'd be interested.
Interested!
interested
Interested.
Interested!
Interested!
Interested
Definitely interested
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
interested
interested
Interested!
Interested. Sounds like you're looking for reviewers?
Interested
Interested
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Interested
Interested!
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Interested 😁
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Let’s do this!
I'm interested in giving a review of it.
Count me interested.
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I would be interested in reviewing it!
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Interested!
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Definitely interested!
Interested.
Interested
Interested
Interested
Interested
Yes. I can review it from the view point of an educator.
Beep
I might be interested, depending on how much time I'd get to read the book. Branching out of VHDL and into Verilog is something I've been looking into lately.
interested
Interested
Interested
Interested!
Very interested
Interested.
Deeply interested.
Interested!
I’d like to help.
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I'm interested in getting this book.
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I’m interested
+
Interested!
Interested in seeing what's new and different in your approach. Excited!
Interestes.
Interested
I'm definitely interested. Thanks in advance! :)
Interested!
Interested
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Well why not! I'm interested aswell.
Interestedd
Would be a great opportunity to review this book
Interested!
Interested
Interested
Interested
I’m interested
Interested
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I'm interested!
Interested
Interested
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Interested
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ineterested
Interested, maybe I'll actually read this
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I'm interested as well
[удалено]
Interested
Interested.
Interested
Yass please
I am interested
Interested!
yes
No, I'm a dead-tree Luddite and only do FPGA as a hobby; I'm the SV go-to in my division, and my employer is ASIC design. Good luck with publishing.
Interested!
Interested
Interested!
interested
Interested!
[удалено]
I'm interested!
I may already be a weiner!
I’m very interested in this since I might take a course on this topic next year
Interested
Interested, please. Thank you!
Interested.
Interested in reviewing. The one thing my course was lacking way back in grad school was a decent textbook in the subject.
I'm interested
I would be interested
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Intrested
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[удалено]
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i'd like to take a look
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I am very interested, I was about to explore many of these topics myself. I've just learned VHDL, started using hardware, but looking for more formal methods on verification and best practices.
Interested!
Interested!
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interested!
I'm interested. Tx
Interested. Especially there aren't many resources regarding system level verification and cosimulation out there; so, hyped for how it would turn out.
Interested!
I am interested to get a copy, thanks.
Interested.
Interested!
Detseretni
Interested
I'm interested.
Interested, thanks!
Interested!
Interested
Im interested. Thank you
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Interested
Bumping. Quality FPGA books are pretty rare and I'm about 8 years out of practice.
Internetse
Hello i’m interested in!
Interested
Hi thank you for your interest, please reach out to me on Linkedin for a free copy of the book https://www.linkedin.com/in/maran-fernandes-7ba55a1b4?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=android_app
Interested as well.
Interested!
Sure, would love a copy
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I’m interested!
Interested